74AHCT125 - Quad buffer/line driver
The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
7A.
The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs.
The 3-state outputs (nY) are controlled by
74AHCT125 Features
* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V
* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Inputs accepts voltages higher than VCC
* For AHC only: opera
