74AHCT30 - 8-input NAND gate

NXP

74AHCT30 Datasheet Preview — Preview of 74AHCT30 PDF

Datasheet Details

Part number	74AHCT30
Manufacturer	NXP ↗
File Size	75.27 KB
Description	8-input NAND gate
Datasheet	74AHCT30_PhilipsSemiconductors.pdf

74AHCT30 Product details

Description

74AHC30; 74AHCT30 The 74AHC/AHCT30 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).They are specified in compliance with JEDEC standard no.7A.The 74AHC/AHCT30 provide the 8-input NAND function.TYPICAL SYMBOL tPHL/tPLH CI CO CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW).PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of output

Features

ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
Balanced propagation delays.
Inputs accept voltages higher than VCC.
For AHC only: operates with CMOS input levels.
For AHCT only: operates with TTL input levels.
Output capability: standard.
ICC category: SSI.
Specified from.
40 to +85 °C and.
40 to +125 °C. QUICK.

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Other Datasheets by NXP

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Published: Apr 3, 2005 |