74F173 - Quad D-type flip-flop 3-State

NXP

74F173 Datasheet Preview — Preview of 74F173 PDF

Datasheet Details

Part number	74F173
Manufacturer	NXP ↗
File Size	88.51 KB
Description	Quad D-type flip-flop 3-State
Datasheet	74F173_PhilipsSemiconductors.pdf

74F173 Product details

Description

The 74F173 is a high speed 4 bit parallel load register with clock enable control, 3 state buffered outputs, and master reset (MR). to high clock (CP) transition. to high clock transition, the register retains the previous data.

Features

Edge.
triggered D.
type register.
Gated clock enable for hold ”do nothing” mode.
3.
state output buffers.
Gated output enable control.
Speed upgrade of N8T10 and current sink upgrade.
Controlled output edges to minimize ground bounces.
48mA sinking capability.

📁 74F173 Similar Datasheet

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Other Datasheets by NXP

74F174 - Hex D flip-flops
74F175A - Quad D flip-flop
74F1763 - Intelligent DRAM controller
74F10 - Triple 3-input NAND gate
74F112 - Dual J-K negative edge-triggered flip-flop
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Published: Apr 3, 2005 |