74LVC126A Datasheet - NXP

74LVC126A Quad buffer/line driver

The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can .

74LVC126A Features

* 5 V tolerant inputs/outputs for interfacing with 5 V logic

* Wide supply voltage range from 1.2 V to 3.6 V

* CMOS low power consumption

* Direct interface with TTL levels

* Complies with JEDEC standard:

* JESD8-7A (1.65 V to 1.95 V)

* JESD8-5A (2.3 V to 2.7 V)

* JES

74LVC126A-NXP.pdf