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74LVC109 Dual JK flip-flop

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Description

INTEGRATED CIRCUITS 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1997 Mar 18 IC24 Da.
The 74LVC109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.

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Features

* Wide supply voltage range of 1.2 to 3.6 V
* In accordance with JEDEC standard no. 8-1A.
* Inputs accept voltages up to 5.5 V
* CMOS low power consumption
* Direct interface with TTL levels
* Output capability: standard
* ICC category: flip-f

Applications

* DC input voltage range DC output voltage range Operating free-air temperature range Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V CONDITIONS LIMITS MIN 2.7 1.2 0 0
* 40 0 0 MAX 3.6 3.6 5.5 VCC +85 20 10 UNIT V V V °C ns/V ABSOLUTE MAXIMUM RATINGS1 In accordance with the Abso

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