MIMX9351DVVXMAB, MIMX9352DVVXMAB - i.MX 93 Application Processors

Datasheet Details

Part number	MIMX9351DVVXMAB, MIMX9352DVVXMAB
Manufacturer	NXP
File Size	2.14 MB
Description	i.MX 93 Application Processors
Datasheet	MIMX9352DVVXMAB-NXP.pdf
Note	This datasheet PDF includes multiple part numbers: MIMX9351DVVXMAB, MIMX9352DVVXMAB. Please refer to the document for exact specifications by model.

(Sheet 1 of 3) Features Two Cortex®-A55 processors operating up to 1.7 GHz.
32 KB L1 Instruction Cache.
32 KB L1 Data Cache.
64 KB per-core L2 cache.
Media Processing Engine (MPE) with Arm® NeonTM technology supporting the Advanced Single Instruction Multiple Data architecture.
Floating Point Unit (FPU) with support of the Arm® VFPv4-D16 architecture Support of 64-bit Arm® v8.2-A architecture 256 KB cluster L3 cache Parity/ECC protection on L1 cache,.

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Published: Sep 15, 2024 |