* Two e5500 Power Architecture cores (one on the P5010)
* Each core has a backside 512-Kbyte L2 Cache with ECC
* Three levels of instructions: User, Supervisor, and Hypervisor
* Independent boot and reset
* Secure boot capability
* CoreNet fabric supp
P5020
3.19 MB
Qoriq integrated communication processor.
Freescale Semiconductor Data Sheet: Technical Data
QorIQ P5020/P5010 Data Sheet
Document Number: P5020 Rev. 1, 03/2015
P5020/P5010
FC-PBGA
*12.
📁 Related Datasheet
P5000EA Thyristor Surge Suppressors (SOCAY)
P5000LA Thyristors Solid Protection Device Bidirectional transient voltage suppressors (WPM)
P5000LA Thyristor Surge Suppressors (SOCAY)
P5000LB Thyristors Solid Protection Device Bidirectional transient voltage suppressors (WPM)
P5000LB Over-voltage Protection Thyristor (LAN)
P5000LB Thyristor Surge Suppressors (SOCAY)
P5000MC Thyristors Solid Protection Device Bidirectional transient voltage suppressors (WPM)
P5000SB Thyristor Surge Suppressors (Kexin)
P5000SB Thyristor Surge Suppressors (SOCAY)
P5000SB Thyristors Solid Protection Device Bidirectional transient voltage suppressors (WPM)
