Description
Freescale Semiconductor Data Sheet: Technical Data QorIQ P5020/P5010 Data Sheet Document Number: P5020 Rev.1, 03/2015 P5020/P5010 FC-PBGA *12.
Features
* Two e5500 Power Architecture cores (one on the P5010)
* Each core has a backside 512-Kbyte L2 Cache with ECC
* Three levels of instructions: User, Supervisor, and Hypervisor
* Independent boot and reset
* Secure boot capability
* CoreNet fabric supp
Applications
* This chip can be used for combined control, data path, and application layer processing in routers, switches, base station controllers, and general-purpose embedded computing. Its high level of integration offers significant performance benefits compared to multiple discrete devices while also grea