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PCA9515 - I2C-bus repeater

Datasheet Summary

Description

The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems.

Features

  • of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515 enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bu.

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Datasheet preview – PCA9515

Datasheet Details

Part number PCA9515
Manufacturer NXP
File Size 94.64 KB
Description I2C-bus repeater
Datasheet download datasheet PCA9515 Datasheet
Additional preview pages of the PCA9515 datasheet.

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Full PDF Text Transcription

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PCA9515 I2C-bus repeater Rev. 09 — 23 April 2009 Product data sheet 1. General description The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515 enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.
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