* 100 ps part-to-part skew typical
* 35 ps output-to-output skew typical
* Differential design
* VBB output
* Low voltage VCC range of +2.375 V to +3.8 V for PECL
* 75 kΩ input pull-down resistors
* ECL/PECL outputs
* Form, fit, and fu
PCK111
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Low voltage 1:10 differential pecl clock driver.
INTEGRATED CIRCUITS PCK111 Low voltage 1:10 differential PECL clock driver Product data File under Integrated Circuits ICL03 2001 Sep 07 P.
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