* 3.3 V operation
* Six differential CPU clock pairs
* Two PCI clocks at 33 MHz and one 3V66 clock
* Two 48 MHz clocks at 3.3 V
* One 14.318 MHz reference clock
* Power management control pins
* Host clock jitter less than 200 ps cycle-to-cycl
PCK2021
108.43 KB
Ck00 100/133 mhz spread spectrum differential system clock generator.
INTEGRATED CIRCUITS PCK2021 CK00 (100/133 MHz) spread spectrum differential system clock generator Product data File under Integrated Circuits, ICL03.
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