Datasheet Details
| Part number | 54F377 |
|---|---|
| Manufacturer | National Semiconductor ↗ |
| File Size | 339.13 KB |
| Description | Octal D Flip-Flop |
| Datasheet |
|
| Part number | 54F377 |
|---|---|
| Manufacturer | National Semiconductor ↗ |
| File Size | 339.13 KB |
| Description | Octal D Flip-Flop |
| Datasheet |
|
The ’F377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW The register is fully edge-triggered The state of each D input one setup time before the LOW-to-HIGH clock transition is transferred to the corresponding flip-flop’s Q output The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation
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