54LS174 Datasheet, Flip-flops, National Semiconductor

54LS174 Features

• Flip-flops Y LS174 contains six flip-flops with single-rail outputs Y LS175 contains four flip-flops with double-rail outputs Y Buffered clock and direct clear inputs Y Individual data input to ea

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54LS174

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National Semiconductor

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📄 Datasheet

Description:

Hex/quad d flip-flops. These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic All have a direct clear input and

54LS174 Application

• Applications include Buffer storage registers Shift registers Pattern generators Y Typical clock frequency 40 MHz Y Typical power dissipation per fl

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54LS174

National Semiconductor

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