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74LS139 - Decoders/Demultiplexers

Datasheet Summary

Description

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be used to minimize the effects of system decoding When used with high-speed mem

Features

  • Y Y Y Y Y Y Y Designed specifically for high speed Memory decoders Data transmission systems LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and or data reception LS139 contains two fully independent 2-to-4-line decoders demultiplexers Schottky clamped for high performance Typical propagation delay (3 levels of logic) LS138 21 ns LS139 21 ns Typical power dissipation LS138 32 mW LS139 34 mW Alternate Military Aerospace devices (54LS138 54LS139) are available C.

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Datasheet Details

Part number 74LS139
Manufacturer National Semiconductor
File Size 165.29 KB
Description Decoders/Demultiplexers
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54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers June 1989 54LS138 DM54LS138 DM74LS138 54LS139 DM54LS139 DM74LS139 Decoders Demultiplexers General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be used to minimize the effects of system decoding When used with high-speed memories the delay times of these decoders are usually less than the typical access time of the memory This means that the effective system delay introduced by the decoder is negligible The LS138 decodes one-of-eight lines based upon the conditions at the three binary select inputs and the three enable inputs
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