* n n n n n n n n n Internal Sample-and-Hold Single +1.9V ± 0.1V Operation Choice of SDR or DDR output clocking Interleave Mode for 2x Sampling Rate Multiple ADC Synchronization Capability Guaranteed No Missing Codes Serial Interface for Extended Control Fine Adjustment of Input Full-Scale Range and O
ADC08D500 Datasheet (928.26 KB)
ADC08D500
National Semiconductor
928.26 KB
500 msps a/d converter.
High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter
May 2005
ADC08D500 High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter
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