Description
~ r * * * * * * * * * * * * * * * *
These Clock Generation and Support clock drivers are specifically designed for driving memory arrays requiring large fanouts while operating at high s.
Features
* the same characteristics of CGS2534 with an added series resistor on the output for ease of termination while reducing the undershoot. This device has minimum skew specifications of 500 ps pinto-pin as well as a 1 ns specification for part-to-part propagation delay variation. Features
* Nom
Applications
* Guaranteed 2 kV ESD protection
Connection Diagram
Pin Assignment for 28
* Pln PLCC
DOUT
COUT IN BOUT
AOUT
o GND 0
o
o
Logic Diagram
CGS2537
AoUT 1
BOUT 1 IN 1
COUT l GND
DOUT 1
AoUT Voo BOUT IN COUT GND DOUT
2
2
2
2
TLIF/11957-2
See NS Package Number V28A
Truth Table
D
