DM54LS165 - 8-Bit Parallel In/Serial Output Shift Registers
DM54LS165 Features
* Y Y Y Y Y Y Complementary outputs Direct overriding (data) inputs Gated clock inputs Parallel-to-serial data conversion Typical frequency 35 MHz Typical power dissipation 105 mW Connection Diagram Dual-In-Line Package TL F 6399
* 1 Order Number DM54LS165J DM54LS165W DM74LS165WM or DM74L
