DS8837 Datasheet PDF - National Semiconductor Hex Unified Bus Receiver Specs

DS8837 - Hex Unified Bus Receiver

Datasheet Summary

Description

The DS7837 DS8837 are high speed receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a 5V logic supply together with a 390X resistor from the bus to ground

Features

Y Y Y Y Y Y Y Y Low receiver input current for normal VCC or VCC e 0V (15 mA typ) Six separate receivers per package Built-in receiver input hysteresis (1V typ) High receiver noise immunity (2V typ) Temperature insensitive receiver input thresholds track bus logic levels TTL compatible disable and output Molded or cavity dual-in-line or flat package High speed Typical.

Datasheet Details

Part number	DS8837
Manufacturer	National Semiconductor
File Size	107.28 KB
Description	Hex Unified Bus Receiver
Datasheet	DS8837 Datasheet
Additional preview pages of the DS8837 datasheet.

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Full PDF Text Transcription

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DS7837 DS8837 Hex Unified Bus Receiver February 1996 DS7837 DS8837 Hex Unified Bus Receiver General Description The DS7837 DS8837 are high speed receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a 5V logic supply together with a 390X resistor from the bus to ground The receiver design employs a built-in input hysteresis providing substantial noise immunity Low input current allows up to 27 driver receiver pairs to utilize a common bus Disable inputs provide time discrimination Disable inputs and receiver outputs are TTL compatible Performance is optimized for systems with bus rise and fall times s 1 0 ms V Features Y Y Y Y Y Y Y Y Low recei

Published: Mar 30, 2005 |