LP2994 Datasheet (National Semiconductor) - DDR Termination Regulator

LP2994, DDR Termination Regulator

The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications (Series Stub Termination Logic) for active termination of DDRSDRAM.

The device utilizes an internal operational amplifier to provide linear regulation of VTT without the need for expensiv

LP2994 Features

* n n n n n n n Source and sink current Low external component count Independent analog and power rails Linear topology Small package SO-8 Low cost and easy to use Shutdown pin Applications n n n n SSTL-2 SSTL-3 DDR-SDRAM Termination DDR-II Termination Typical Application Circuit 20045904 FIGURE 1