LP2995 Datasheet (National Semiconductor) - DDR Termination Regulator

LP2995, DDR Termination Regulator

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDRSDRAM.

The device contains a high-speed operational amplifier to provide excellent response to load transients.

The output stage prevents shoot through while delivering 1.5A continuous cu

LP2995 Features

* n n n n n n n n Low output voltage offset Works with +5v, +3.3v and 2.5v rails Source and sink current Low external component count No external resistors required Linear topology Available in SO-8, PSOP-8 or LLP-16 packages Low cost and easy to use Applications n DDR Termination Voltage n SSTL-2 n