LP2996 Datasheet - Texas Instruments

LP2996 Termination Regulator

The LP2996-N and LP2996A linear regulators are designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, while LP2996A supports DDR3 and DDR3L VTT bus termination with VDDQ minimum of 1.35 V. The device contains a high-speed operational amplifier t.

LP2996 Features

* 1 Minimum VDDQ:

* 1.8 V (LP2996-N)

* 1.35 V (LP2996A)

* Source and Sink Current

* Low Output Voltage Offset

* No External Resistors Required for Setting Output Voltage

* Linear Topology

* Suspend to Ram (STR) Functionality

* St

LP2996 Datasheet (1.94 MB)