* ad geometry, the packages will self align when subjected to a solder reflow process. 0.5 min. (3x) TYPICAL SOLDERING PATTERN Unit: mm 0.5 min. (3x) ÉÉÉ ÉÉÉ ÉÉÉ 1.4 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 0.5 1 SOT
* 416/SC
* 75 POWER DISSIPATION The power dissipation of the SOT
* 416/SC
DTA114TET1 Datasheet (211.37 KB)
DTA114TET1
211.37 KB
Bias resistor transistor.
DTA114EET1 SERIES Bias Resistor Transistor
PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
This new series of digital trans.
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