* ad geometry, the packages will self align when subjected to a solder reflow process. 0.5 min. (3x) TYPICAL SOLDERING PATTERN Unit: mm 0.5 min. (3x) ÉÉÉ ÉÉÉ ÉÉÉ 1.4 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 0.5 1 SOT
* 416/SC
* 75 POWER DISSIPATION The power dissipation of the SOT
* 416/SC
DTA114YET1 Datasheet (211.37 KB)
DTA114YET1
211.37 KB
Bias resistor transistor.
DTA114EET1 SERIES Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital trans.
📁 Related Datasheet
DTA114YE PNP Digital Transistor (JCET)
DTA114YE PNP Transistor (JinYu)
DTA114YE PNP Digital Transistors (SeCoS)
DTA114YE Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network (Motorola Inc)
DTA114YE PNP -100mA -50V Digital Transistors (Rohm)
DTA114YE PNP Digital Transistor (Taiwan Semiconductor)
DTA114YE Digital Transistors (ON Semiconductor)
DTA114YE PNP Silicon Transistor (WEITRON)
DTA114YEB PNP -100mA -50V Digital Transistors (Rohm)
DTA114YEFRA PNP Digital Transistor (ROHM)
