EMD5DXV6T1 - Dual Bias Resistor Transistors
www.DataSheet4U.com EMD5DXV6T1, EMD5DXV6T5 Preferred Devices Product Preview Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base emitter resistor.
These digital transistors are designed to replace a single device and its external resistor bias network.
The BRT eliminat
EMD5DXV6T1 Features
* C K 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. MILLIMETERS MIN MAX 1.50 1.70 1.10 1.30 0.50 0.60 0.17 0.27 0.50 B
