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MC100EP195 3.3V ECL Programmable Delay Chip

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Description

3.3 V ECL Programmable Delay Chip MC100EP195 The MC100EP195 is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing ad.
Pin Name I/O Default State Description 23, 25, 26, 27, D[0:9] LVCMOS, LVTTL, Low Single. Ended Parallel Data Inputs [0:9].

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MC100EP195 Distributors

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