MC100EP195B Datasheet (ON Semiconductor) - 3.3V ECL Programmable Delay Chip

MC100EP195B, 3.3V ECL Programmable Delay Chip

The MC100EP195B is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment.

It provides variable delay of a differential NECL/PECL input transition.

The delay section consists of a programmable matrix of gates and multiplexers as shown in the logic diagram, Figu

MC100EP195B Features

* Maximum Input Clock Frequency >1.2 GHz Typical

* Programmable Range: 0 ns to 10 ns

* Delay Range: 2.2 ns to 12.2 ns

* 10 ps Increments

* PECL Mode Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V

* NECL Mode Operating Range: VCC = 0 V with VEE =