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MC100LVEL39 Clock Generation Chip

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Description

MC100LVEL39 3.3 V ECL ÷2/4, ÷4/6 Clock Generation Chip .
The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications.

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Features

* www. onsemi. com SOIC
* 20 WB DW SUFFIX CASE 751D MARKING DIAGRAM
* 20 100LVEL39 AWLYYWWG 1 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb-Free Package

Applications

* The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single-ended input signal. In addition, by using the VBB output, a sinusoidal source can be AC coupled into the device. The common

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