MC100LVEL51 Differential Clock D Flip-Flop

ON Semiconductor

Description

3.3 V ECL Differential Clock D Flip‐Flop MC100LVEL51 .
The MC100LVEL51 is a differential clock D flip-flop with reset.

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Datasheet Specifications

Part number: MC100LVEL51
Manufacturer: ON Semiconductor ↗
File Size: 244.74 KB
Datasheet: MC100LVEL51_ONSemiconductor.pdf
Description: Differential Clock D Flip-Flop

Features

* 475 ps Propagation Delay
* 2.8 GHz Toggle Frequency
* ESD Protection: > 4 kV Human Body Model, > 200 V Machine Model
* The 100 Series Contains Temperature Compensation
* PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V
* NECL Mode Opera

Applications

* which require the ultimate in AC performance at 3.3 V VCC. The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differentia

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MC100LVEL51 Differential Clock Flip-Flop ON Semiconductor

ON Semiconductor MC100LVEL51-like datasheet