MC100LVEP210 - 2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver
The MC100LVEP210 is a low skew 1 *to *5 dual differential driver, designed with clock distribution in mind.
The ECL/PECL input signals can be either differential or single *ended if the VBB output is used.
The signal is fanned out to 5 identical differential outputs.
HSTL inputs
