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NB3N108K - 3.3V Differential 1:8 Fanout Clock Data Driver

NB3N108K Description

NB3N108K 3.3V Differential 1:8 Fanout Clock Data Driver with HCSL Outputs .
The NB3N108K is a differential 1:8 Clock fanout buffer with High. speed Current Steering Logic (HCSL) outputs optimized for ultra low propagati.

NB3N108K Features

* Typical Input Clock Frequency 100, 133, 166, or 400 MHz
* 220 ps Typical Rise and Fall Times
* 800 ps Typical Propagation Delay
* Dtpd 100 ps Maximum Propagation Delay Variation Per Each Diff Pair
* 0.1 ps Typical Integrated Phase Jitter RMS
* Operat

NB3N108K Applications

* in mind. Inputs can directly accept differential LVPECL, LVDS, HCSL signals per Figures 7, 8, and 9. Single
* ended LVPECL, HCSL, LVCMOS, or LVTTL levels are accepted with a proper external Vth reference supply per Figures 4 and 10. Input pins incorporate separate internal 50 W termination res

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3.3V Differential Fanout Clock Data Driver ON Semiconductor
ON Semiconductor NB3N108K-like datasheet