SN74LS161A Datasheet - ON Semiconductor

SN74LS161A BCD Decade Counters / 4-Bit Binary Counters

SN74LS161A, SN74LS163A BCD Decade Counters/ 4 Bit Binary Counters The LS161A/163A are high-speed 4-bit synchronous counters. They are edge-triggered, synchronously presettable, and cascadable MSI building blocks for counting, memory addressing, frequency division and other applications. The LS161A and LS163A count modulo 16 (binary). The LS161A has an asynchronous Master Reset (Clear) input that overrides, and is independent of, the clock and all other control inputs. The LS163A has a S.

SN74LS161A Features

* r>

* is defined as the minimum time required between the end of the reset pulse and the clock transition from LOW to HIGH in order to recognize and transfer HIGH Data to the Q outputs. AC WAVEFORMS tW(H) tW(L) CP 1.3 V tPHL 1.3 V tPLH Other conditions: PE = MR (SR) = H CEP = CET = H Q 1.3 V 1

SN74LS161A Datasheet (195.43 KB)