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PLL520-30 PECL and LVDS Low Phase Noise VCXO

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Description

Preliminary www.DataSheet4U.com PLL520-30 PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal) DIE CONFIGURATION 65 mil 25 26 24 23 22 21 20.
Y (0,0) PLL520-30 is a VCXO IC specifically designed to pull frequency fundamental crystals from 65MHz to 130MHz, with selectable PECL or LVDS outp.

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Datasheet Specifications

Part number
PLL520-30
Manufacturer
PhaseLink Corporation
File Size
525.91 KB
Datasheet
PLL520-30_PhaseLinkCorporation.pdf
Description
PECL and LVDS Low Phase Noise VCXO

Features

* 65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz
* 130MHz (no PLL). Low Injection Power for crystal 50uW. Complementary outputs: PECL or LVDS. Selectable OE Logic Integrated variable capaci

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