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HYI25D256800C, HYI25D256160C Datasheet - Qimonda

HYI25D256160C_Qimonda.pdf

This datasheet PDF includes multiple part numbers: HYI25D256800C, HYI25D256160C. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number:

HYI25D256800C, HYI25D256160C

Manufacturer:

Qimonda

File Size:

2.11 MB

Description:

256-mbit double-data-rate sdram.

Note:

This datasheet PDF includes multiple part numbers: HYI25D256800C, HYI25D256160C.
Please refer to the document for exact specifications by model.

HYI25D256800C, HYI25D256160C, 256-Mbit Double-Data-Rate SDRAM

DQS, as well as to both edges of CK.

Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence.

Accesses begin with the registration of an Active command, which is then followed by a R

March 2007 HYB25D256[40/80/16]0CE(L) HYB25D256[40/80/16]0C[T/C/F] HYI25D256[80/16]0C[C/E/F/T] www.DataSheet4U.com 256-Mbit Double-Data-Rate SDRAM DDR SDRAM RoHS Compliant or Lead-Containing Internet Data Sheet Rev.

2.3 Internet Data Sheet HY[B/I]25D256[16/40/80]0C[E/C/F/T](L) 256 Mbit Double-Data-Rate SDRAM HYB25D256[40/80/16]0CE(L), HYB25D256[40/80/16]0C[T/C/F], HYI25D256[80/16]0C[C/E/F/T] Revision History: 2007-03, Rev.

2.3 Page All 17 www.DataSheet4U.com 72 85, 86 Subjects (major change

HYI25D256800C Features

* Auto Precharge option for each burst access Auto Refresh and Self Refresh Modes RAS-lockout supported tRAP = tRCD 7.8 µs Maximum Average Periodic Refresh Interval 2.5 V (SSTL_2 compatible) I

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