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HYI25D256800C

256-Mbit Double-Data-Rate SDRAM

HYI25D256800C Features

* Auto Precharge option for each burst access Auto Refresh and Self Refresh Modes RAS-lockout supported tRAP = tRCD 7.8 µs Maximum Average Periodic Refresh Interval 2.5 V (SSTL_2 compatible) I

HYI25D256800C General Description

DQS, as well as to both edges of CK. Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an Active command, which is then followed by a R.

HYI25D256800C Datasheet (2.11 MB)

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Datasheet Details

Part number:

HYI25D256800C

Manufacturer:

Qimonda

File Size:

2.11 MB

Description:

256-mbit double-data-rate sdram.
March 2007 HYB25D256[40/80/16]0CE(L) HYB25D256[40/80/16]0C[T/C/F] HYI25D256[80/16]0C[C/E/F/T] www.DataSheet4U.com 256-Mbit Double-Data-Rate SDRAM DD.

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TAGS

HYI25D256800C 256-Mbit Double-Data-Rate SDRAM Qimonda

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