HYS72T512522HFN-3.7-A Datasheet - Qimonda

HYS72T512522HFN-3.7-A 240-Pin Fully-Buffered DDR2 SDRAM Modules

Standard High-Speed Differential Point-to-Point Link Interface at 1.5 V. The Advanced Memory Buffer also allows buffering of memory traffic to support large memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing, refresh, scrubbing, sparin.

December 2006 Cover Page www.DataSheet4U.com HYS72T512[4/5]22HFN [3S/3.7] A 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.3 Internet Data Sheet www.DataSheet4U.com Revision History Revision History: 2006-12-07, Rev. 1.3 All Page 20 Page 4 Page 20 Page 26 Adapted internet edition HYS72T512[4/5]22HFN [3S/3.7] A 240-Pin Fully-Buffered DDR2 SDRAM Modules Updated “Current Spec. and Conditions” on Page 20 .

HYS72T512522HFN-3.7-A Features

* Detects errors on the channel and reports them to the host memory controller.

* Automatic DDR2 DRAM Bus Calibration.

* Automatic Channel Calibration.

* Full Host Control of the DDR2 DRAMs.

* Over-Temperature Detection and Alert.

* Hot Add-on and Hot

HYS72T512522HFN-3.7-A Datasheet (1.86 MB)