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HYS72T512022EP-3.7-B - 240-Pin Dual Die Registered DDR2 SDRAM Modules

This page provides the datasheet information for the HYS72T512022EP-3.7-B, a member of the HYS72T512022EP-3S-B 240-Pin Dual Die Registered DDR2 SDRAM Modules family.

Datasheet Summary

Description

loading to the system bus, but adds one cycle to the SDRAM timing.

Decoupling capacitors are mounted on the PCB board.

The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol.

Features

  • Programmable self refresh rate via EMRS2 setting Programmable partial array refresh via EMRS2 settings DCC enabling via EMRS2 setting All inputs and outputs SSTL_18 compatible Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) Serial Presence Detect with E2PROM RDIMM Dimensions (nominal): 30 mm high, 133.35 mm wide Based on standard reference card layouts Raw Card “K” All spee.

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Datasheet Details

Part number HYS72T512022EP-3.7-B
Manufacturer Qimonda
File Size 2.03 MB
Description 240-Pin Dual Die Registered DDR2 SDRAM Modules
Datasheet download datasheet HYS72T512022EP-3.7-B Datasheet
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March 2007 www.DataSheet4U.com HYS72T512022EP–3.7–B HYS72T512022EP–3S–B 240-Pin Dual Die Registered DDR2 SDRAM Modules RDIMM SDRAM RoHS Compliant Internet Data Sheet Rev. 1.0 Internet Data Sheet www.DataSheet4U.com HYS72T[512/1G]0x2EP–[3S/3.7]–B Registerd DDR2 SDRAM Module HYS72T512022EP–3.7–B, HYS72T512022EP–3S–B Revision History: 2007-03, Rev. 1.0 Page All All Subjects (major changes since last revision) Adapted internet edition Final Document We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc@qimonda.com qag_techdoc_rev400 / 3.
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