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HYS72T512022HR-5-A, HYS72T512022HR-3S-A 240-Pin Registered DDR2 SDRAM Modules

HYS72T512022HR-5-A Description

January 2007 www.DataSheet4U.com HYS72T256023HR *5 *A HYS72T 512022 H R * 3 S * A HYS72T512022HR *3.7 *A HY.
capacitive loading to the system bus, but adds one cycle to the SDRAM timing.

HYS72T512022HR-5-A Features

* Auto Refresh (CBR) and Self Refresh
* Average Refresh Period 7.8 µs at a TCASE lower than 85 °C, 3.9µs between 85 °C and 95 °C.
* All inputs and outputs SSTL_1.8 compatible
* Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT)
* Serial Pr

HYS72T512022HR-5-A Applications

* Two rank 256M × 72, 512M × 72 module organization and 2 × 128M × 8, 2 × 256M × 4 chip organization
* 2GByte, 4 GByte module built with stacked 1-Gbit DDR2 SDRAMs in P-TFBGA-71 chipsize packages
* Standard DDR2 Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) p

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: HYS72T512022HR-5-A, HYS72T512022HR-3S-A. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
HYS72T512022HR-5-A, HYS72T512022HR-3S-A
Manufacturer
Qimonda
File Size
2.08 MB
Datasheet
HYS72T512022HR-3S-A_Qimonda.pdf
Description
240-Pin Registered DDR2 SDRAM Modules
Note
This datasheet PDF includes multiple part numbers: HYS72T512022HR-5-A, HYS72T512022HR-3S-A.
Please refer to the document for exact specifications by model.

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240-Pin Registered DDR2 SDRAM Modules Qimonda
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