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854S057 4:1 or 2:1 LVDS Clock Multiplexer

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Description

4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination 854S057 DATA SHEET General .
The 854S057 is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz.

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Datasheet Specifications

Part number
854S057
Manufacturer
Renesas ↗
File Size
451.34 KB
Datasheet
854S057-Renesas.pdf
Description
4:1 or 2:1 LVDS Clock Multiplexer

Features

* High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer
* One LVDS output pair
* Four selectable PCLK, nPCLK inputs with internal termination
* PCLKx, nPCLKx pairs can accept the following differential input levels: LVPEC

Applications

* The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal resistor) will transform the device into a 2:1 multiplexer. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered da

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