Datasheet Specifications
- Part number
- 8P34S1102
- Manufacturer
- Renesas ↗
- File Size
- 1.34 MB
- Datasheet
- 8P34S1102-Renesas.pdf
- Description
- 1:2 LVDS 1.8V / 2.5V Fanout Buffer
Description
1:2 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks 8P34S1102 Datasheet .
Features
* ▪ Two low skew, low additive jitter LVDS output pairs ▪ One differential clock input pair ▪ Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML ▪ Maximum input clock frequency: 51.2GHz ▪ Output skew: 3ps (typical) ▪ Propagation delay: 400ps (maximum) ▪ Low addiApplications
* demanding well-defined performance and repeatability. One differential input and two low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the differential device input. The device is optimized for low power consumption and low addi8P34S1102 Distributors
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