8P34S1102 Datasheet (Renesas) - 1:2 LVDS 1.8V / 2.5V Fanout Buffer

8P34S1102, 1:2 LVDS 1.8V / 2.5V Fanout Buffer

The 8P34S1102 is a high-performance differential LVDS fanout buffer.

The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals.

The 8P34S1102 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power sup

8P34S1102 Features

* ▪ Two low skew, low additive jitter LVDS output pairs ▪ One differential clock input pair ▪ Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML ▪ Maximum input clock frequency: 51.2GHz ▪ Output skew: 3ps (typical) ▪ Propagation delay: 400ps (maximum) ▪ Low addi