8P34S1208 Datasheet (Renesas) - 2:8 LVDS 1.8V / 2.5V Fanout Buffer

8P34S1208, 2:8 LVDS 1.8V / 2.5V Fanout Buffer

The 8P34S1208 is a high-performance differential LVDS fanout buffer.

The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals.

The 8P34S1208 supports fail-safe operation and is characterized to operate from a 1.8V or 2.5V power sup

8P34S1208 Features

* Eight low skew, low additive jitter LVDS output pairs

* Two selectable, differential clock input pairs

* Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML

* Maximum input clock frequency: 1.5GHz

* LVCMOS/LVTTL interfa