Datasheet Specifications
- Part number
- 8S89296
- Manufacturer
- Renesas ↗
- File Size
- 544.20 KB
- Datasheet
- 8S89296-Renesas.pdf
- Description
- LVDS Programmable Delay Line
Description
LVDS Programmable Delay Line 8S89296 Datasheet .
Features
* ▪ One LVDS level output ▪ One differential clock input pair ▪ Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML ▪ Maximum frequency: 800MHz ▪ Programmable Delay Range: 2.2ns to 12.5ns in 10ps steps ▪ D[10:0] can accept LVPECL, LVCMOS or LVTTL levels ▪ Fu8S89296 Distributors
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