HD74CDCF2509B - 3.3-V Phase-lock Loop Clock Driver
The HD74CDCF2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver.
It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
It is specifically designed for use with synchronous DRAMs.
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