* Ultra-Low Power Technology
* 1.6 V to 3.6 V operation from a single supply
* Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
* Halt (RTC + LVD): 0.57 µA
* Snooze: 0.7 mA (UART), 0.6 mA (ADC)
* Operating: 66 µA/MHz 16-bit RL78 CPU Core
* Delivers
R5F10EBAGNA Datasheet (1.35 MB)
R5F10EBAGNA
1.35 MB
Mcu.
Datasheet Specifications in this document are tentative and subject to change. RL78/G1A R01DS0151EJ0230 RENESAS MCU Rev.2.30 Apr 26, 2024 Combin.
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