* Low power consumption technology
* VDD = single power supply voltage of 2.4 to 5.5 V
* HALT mode
* STOP mode RL78 CPU core
* CISC architecture with 3-stage pipeline
* Minimum instruction execution time: Can be changed from high speed (0.0625 μs: @ 16 MHz operation with high-spee
R5F12007ANS Datasheet (2.85 MB)
R5F12007ANS
2.85 MB
Mcu.
DATASHEET
RL78/G15 RENESAS MCU
R01DS0420EJ0130 Rev.1.30
Aug 9, 2024
True low-power platform, 54-µA/MHz operating current, TA = 125°C operation, fro.
📁 Related Datasheet
R5F12007GNS MCU (Renesas)
R5F12007MNS MCU (Renesas)
R5F12008ANS MCU (Renesas)
R5F12008ASN MCU (Renesas)
R5F12008GNS MCU (Renesas)
R5F12008MNS MCU (Renesas)
R5F12008MSN MCU (Renesas)
R5F12017ASP MCU (Renesas)
R5F12017GSP MCU (Renesas)
R5F12017MSP MCU (Renesas)
