R5F52201BDFL Datasheet - Renesas

R5F52201BDFL 32-MHz 32-bit RX MCUs

* * * * * Maximum operating frequency: 32 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per state (cycle of the system clock) Address space: 4-Gbyte linear Register General purpose: Sixteen 32-bit registers Control: Eight 32-bit registers Accumulator: One .

R5F52201BDFL Features

* 32-bit RX CPU core

* Max. operating frequency: 32 MHz

* Capable of 49 DMIPS in operation at 32 MHz

* Accumulator handles 64-bit results (for a single instruction) from 32- × 32-bit operations

* Multiplication and division unit handles 32- × 32-bit operations (multiplication ins

R5F52201BDFL Datasheet (1.00 MB)