RC22504A Datasheet - Renesas

Sub-100fs Frequency Synthesizer

RC22504A Features

* Jitter as low as 64 fs RMS maximum (10kHz to 20MHz)

* PLL core consists of fractional-feedback Analog PLL (APLL) ○ Operates from a 25MHz to 80MHz crystal or XO ○ APLL frequency independent of input / crystal frequency ○ Operates as a frequency synthesizer or Digitally Controlled Os

RC22504A General Description

The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max). The RC22504A can act as a frequency synthesizer to locally generate the reference clock .

RC22504A Datasheet (2.43 MB)