RC32504A

Universal Frequency Translator

Renesas

RC32504A Features

* Jitter below 100fs RMS (10kHz to 20MHz)

* Compliant with ITU-T G.8262 for synchronous Ethernet/OTN (EEC/OEC) and ITU-T G.8262.1 for enhanced synchronous Ethernet/OTN (eEEC/eOEC)

* PLL core consists of fractional-feedback Analog PLL (APLL) which can optionally be steered by

RC32504A General Description

The RC32504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs. The RC32504A can act as a frequency synthesizer to locally generate the reference clock, a jit.

RC32504A Datasheet (2.69 MB)