* parallel inputs, parallel outputs, J-K serial inputs, a SHIFT/LOAD control input, and a direct overriding CLEAR. This shift register can operate in two modes : Parallel Load ; Shift from QA towards QD. Parallel loading is accomplished by applying the four bits of data, and taking the SHIFT/LOAD cont
M54HC195 Datasheet (264.08 KB)
M54HC195
264.08 KB
8 bit pipo shift register.
M54HC195 M74HC195
8 BIT PIPO SHIFT REGISTER
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HIGH SPEED tPD = 13 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA.
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