M74HC280 Datasheet - ST Microelectronics

M74HC280 9 BIT PARITY GENERATOR

The M74HC280 is a high-speed CMOS 9-bit parity generator fabricated with silicon gate C2MOS technology. It is composed of nine data inputs (A to I) and odd/even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high-level inputs is odd, ΣODD outp.

M74HC280 Features

* High-speed: tPD = 22 ns (typ.) at VCC = 6 V

* Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C

* High noise immunity: VNIH = VNIH = 28 % VCC (min)

* Symmetrical output impedance: |IOH| = IOL = 4 mA (min.)

* Balanced propagation delays: tPLH ≅ tPHL

M74HC280 Datasheet (414.25 KB)