M74HC4514 Datasheet - ST Microelectronics

M74HC4514 HC4514: 4 TO 16 LINE DECODER/LATCH

The M74HC4514 is an high speed CMOS 4 LINE TO 16 LINE SEGMENT DECODER WITH LATCHED INPUTS fabricated with silicon gate C2MOS technology. A binary code stored in the four input latches (A to D) provides a high level at the selected one of sixteen outputs excluding the other fifteen outputs, when the .

M74HC4514 4 TO 16 LINE DECODER/LATCH s s s s s s s HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4514 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC4514B1R M74HC4514M1R T&R M74HC4514RM13TR M7.

M74HC4514 Datasheet (289.05 KB)