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STCCP27A

High speed dual differential line receivers

STCCP27A General Description

The STCCP27A receiver converts the subLVDS clock/datastream (up to 416 Mbps throughput bandwidth) back into parallel 8 bits of CMOS/ LVTTL. The device recognizes the CCP 32bit start of frame (SOF), end of frame (EOF), start of line (SOL) and end of line (EOL) sequences to generate the H-SYNC and V-S.

STCCP27A Datasheet (305.18 KB)

Preview of STCCP27A PDF

Datasheet Details

Part number:

STCCP27A

Manufacturer:

STMicroelectronics ↗

File Size:

305.18 KB

Description:

High speed dual differential line receivers.

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STCCP27A High speed dual differential line receivers ST Microelectronics

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